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您有机会在 IDF 抽奖现场参与抽奖并赢取精美奖品。4 月 14 日星期三 15:50 在 4 层技术展示区入口处举行。机会难得，不容错过！奖品是基于英特尔® 酷睿™ i7处理器的笔记本一台！
每天的最后一堂技术课程及动手实验室都有幸运抽奖活动，奖品为罗技无线鼠标，请留到最后勿失良机。关于抽奖条款及细则，请访问：http://www.intel.com/cn/idf2010/termsandconditions.htm
*4 月 13 日星期二下午 17:00，第一天活动结束后，Mark Bohr 和 Kevin Zhang 将在 309B 室主持一场关于片上系统热点问题的现场问答活动。
Pranav Mehta is a senior principal engineer and Director of Architecture for the Embedded and Communications Processor Division within Intel's Architecture Group. His team focuses on optimizing embedded IA building blocks for the communications, storage, and embedded market segments. This involves understanding performance bottlenecks in IA CPU and system architectures for these application segments; developing solutions to remove those bottlenecks; and finally, modeling these solutions to ensure proper return on investment before incorporating them into IA silicon.
Matthew J. Adiletta is an Intel Fellow and Director of Communication Infrastructure and Architecture in the Intel Architecture Group, based in Massachusetts.
Adiletta joined Intel in 1998. He led the completion of the Intel® IXP1200 network processor and subsequently developed the Intel® IXP2XXX network processor product line. Adiletta is currently driving the next-generation of network processors for greater packet processing capability and security in future Internet, wireless and enterprise equipment. He holds 46 patents, with more than 44 patents pending.
Prior to joining Intel, Adiletta worked at Digital Equipment Corporation where he was responsible for developing high-speed microprocessors and video compression chips. Adiletta led the development of Digital's first-generation network processor in 1996.
Adiletta graduated with honors from the University of Connecticut with a bachelor's degree in Electrical Engineering in 1985. He was born in Greenwich, Conn.
